Cache and interconncect architectures in multiprocessord
/ edited by Michel Dubois and Shreekant S. Thakkar
Cache and interconncect architectures in multiprocessord
نویسنده
/ edited by Michel Dubois and Shreekant S. Thakkarنسخه 1
0-7923-9074-1
فهرست
شناسنامه
عنوان و نام پدیدآور
Cache and interconncect architectures in multiprocessord / / edited by Michel Dubois and Shreekant S. Thakkarمشخصات نشر
بوستون : : Kluwer Academic Publishers، 1990ممشخصات ظاهری
xii, 276 p.؛ ; 24 cm؛ : ill,l.موضوع
Computer networks protocolsCongresses
Multiprocessors
Congresses
Computer network architectures
Congresses
شناسه های افزوده
Dubois, Nichel, 1953-، نویسنده .
Thakkar, S. S، نویسنده .
Interconnect architectures in multiprocessors، نویسنده .
Thakkar, S. S، نویسنده .
Interconnect architectures in multiprocessors، نویسنده .
زبان
انگلیسیشماره بازیابی
کنگره:
انگليسي.
Papers presented at a workshop titledCache and Intercommect Architectures in Multiprocessors, held in Eilat, Israel, May 25-26, 1989.
Includes biliographical references and index.
Papers presented at a workshop titledCache and Intercommect Architectures in Multiprocessors, held in Eilat, Israel, May 25-26, 1989.
Includes biliographical references and index.
