Formal VLSI correctness Verification VLSI Design methods II

Name: Formal VLSI correctness Verification VLSI Design methods II
Author: / edited by Luc J. M. Claesen

Author

/ edited by Luc J. M. Claesen

کتابخانه مرکزی دانشگاه تهران

Edition 1

0-444-88688-5

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Digital Version(s)

شناسنامه

Title and Author

Formal VLSI correctness Verification VLSI Design methods II / / edited by Luc J. M. Claesen

Publication Details

آمستردام : : North - Holland، 1990م

Physical Description

xv; 427 p.؛ ; 25 cm؛ :fig..

Subject

Integrated Circuits
Very large scale integration
Desige and construction
Data processing - Congresses
Integrated circuits
very large scale integaration
Design and construction
Data processing
Congresses

Added Identifiers

Claesen, Luc J. M، نویسنده .
Interuniversity Micro - Electronics Center، نویسنده .

Language

انگلیسی

Retrieval Number

Congress:

Notes

انگليسي.

Includes bibliographical references and index.

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