Switch - level timing simulation of MOS VLSI circuits
/ by Vasant B. Rao...
Switch - level timing simulation of MOS VLSI circuits
Author
/ by Vasant B. Rao...Edition 1
0-89838-302-1
list
شناسنامه
Title and Author
Switch - level timing simulation of MOS VLSI circuits / / by Vasant B. Rao...Publication Details
بوستون : : Kluwer Academic Publishers، 1989مPhysical Description
x, 209 p.؛ ; 24 cm؛ : fig..Subject
Integrated CircuitsVey large scale integation
Computer simulation
series
(The Kluwer international series in engineering and computer science؛ ; 66, VLSI, computer architecture and digital signal processing)Added Identifiers
Rao, Vasant B، نویسنده .
Language
انگلیسیRetrieval Number
Congress:
انگليسي.
Includes bibliographical references (p.193 - 203) and index.
Includes bibliographical references (p.193 - 203) and index.
